Executive Summary

August 26, 2007
Russell Fish

The Opportunity:

The acquirer of the TOMI™ technology will have the opportunity to aggressively compete in several segments of the computer industry from the smallest embedded cell phone processors to the largest data mining commercial mainframes.

Why is the TOMI™ architecture special?

The computer industry of the early 21st century is stymied by two huge and related limitations:

- The Power Wall

- The Memory Wall

The "Power Wall" describes the limit on computer performance imposed by power consumption and it's mirror, heat dissipation. 

The "Memory Wall" describes the limit on computer performance imposed by the bottleneck between memory and processor.  Also known as the "Von Nuemann Bottleneck", this limit is the "speed of light" for all processors.  In other words, no processor can execute instructions faster than it can read them from memory.

The TOMI architecture substantially mitigates both the "Power Wall" and the "Memory Wall", and it does so at substantially lower cost than existing legacy architectures.

How does the TOMI™ architecture do what it does?


Really small CPU

- The TOMI instruction set factors the operations necessary for a general purpose computer to 7 instructions.  This compares with the Arm's 136 instructions, the Itanium's 200+, and the Pentium's 500+.

Furthermore, these instructions have been simplified such that they can execute in a single system cycle as opposed to  30 cycles for the latest generation Pentium.

This instruction factoring means a 32-bit TOMI CPU may be implemented in 40 thousand transistors compared to 250 million transistors for the latest generation Pentium.

2. Many processors co resident with memory - Since the 32-bit TOMI CPU is one of the most compact 32-bit CPUs ever created, many of them can be built on the same silicon chip.  In fact many of them can be built on the same silicon chip that contains the main memory DRAM.

Since the TOMI CPUs are small enough to reside next to a DRAM, they now have access to the ultra-wide internal DRAM bus.  In modern DRAMs this bus is 8 thousand bits wide.  This compares to the Pentium memory bus of 64 bits and the Itanium bus of 128 bits.

What are the effects of the TOMI™ architecture?

1. Dramatically reduced power consumption and heat generation - The power consumption of CPUs is directly related to the number of transistors used in the design.  The TOMI CPU contains fewer than 1 one thousandth of the transistors of a recent generation Pentium. 

The TOMI architecture further reduces power consumption by eliminating the need to constantly drive the off-chip  memory bus.

The low power of the TOMI architecture makes possible many battery and solar powered applications.  The TOMI architecture eliminates fans, large heat sinks, and exotic cooling mechanisms. 

The power efficiency of the TOMI architecture also makes practical single chassis million processor systems.

2. Dramatically increased speed - The TOMI architecture reduces the "Memory Wall" by up to 99%.  The 8192 bit internal bus feeding the TOMI CPUs compares to the 64 bit memory bus of the Pentium and the 128 bit bus of the Itanium.

Furthermore, the TOMI architecture is a multiprocessor design.  That means that several processors can work on the same problem at the same time.  Two broad classes of problems fall into this multiprocessor category, pattern searching and pattern manipulation.

A metaphor for pattern searching might be looking up a name in the phone book.  One person can look up a name in a certain amount of time.  If you tear the phone book into 50 equal pieces and have 50 people look for a name at the same time, you will find it much faster.

A metaphor for pattern manipulation is painting a house.  One painter might take a week.  Fifty painters might be done by noon on the first day.

3. Dramatically reduced cost - The TOMI architecture is designed to be integrated into a DRAM, the least expensive main memory technology made.  Sixty four 32-bit TOMI CPUs add 1% to the number of transistors of a 512M DRAM.

Very few designs have placed a CPU on a DRAM because:

- The CPUs were so large they left little room for the DRAM.

- The CPUs required so much power that they made the DRAM malfunction or overheat.

The TOMI architecture removes those barriers.

What are the applications?

TOMI architecture applications may be broadly categorized as pattern searching and pattern manipulation.  A few example possibilities from the very small to the very large include:

- A solar powered disposable laptop computer.

- A language translating cell phone.

- A line powered network encrypter built into a connector.

- An facial image recognizing security camera.

- A video rendering, morphing, and editing system built into a camcorder.

- A 1000 CPU blade server in the same space and consuming the same power as a current 4 CPU board.

- A spread spectrum wall penetrating imager.

- A router security appliance built into a cable.

- A desktop 1-day DNA sequencer.

- A million CPU data-mining tool in a single cabinet.